A PCI DAQ board for MWPC detectors with high-rate 2D delay line position readout
✍ Scribed by F.V Levchanovski; B Gebauer; E.I Litvinenko; A.S Nikiforov; V.I Prikhodko; Ch Schulz; Th Wilpert
- Publisher
- Elsevier Science
- Year
- 2004
- Tongue
- English
- Weight
- 180 KB
- Volume
- 529
- Category
- Article
- ISSN
- 0168-9002
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✦ Synopsis
For high rate thermal neutron (and e.g. also synchrotron radiation) detection a PCI data acquisition (DAQ) board for readout of two-dimensional position-sensitive multi-wire proportional chamber (MWPC) detectors with delay line position encoding was developed, and a first series of boards was produced and tested. The MWPC board comprises a deadtime-less 8-channel multihit TDC chip of the F1 type with B120 ps LSB, a 40 MHz flash ADC, a FPGA, a FIFO, a 0.9 GFLOP DSP chip TMS320C6711 and a 256 MB histogram memory. For position encoding a positionindependent start and four position-dependent stop signals are recorded from the MWPC anode and from either end of X and Y delay lines connected to the MWPC cathodes, respectively. Time-of-flight (TOF) can be measured with reference to a pulsed beam or chopper signal either with X25 ns bin size for TOF ranges of up to B420 ms or alternatively with B120 ps LSB for ranges p16 ms: The pulse height of the MWPC anode signal is digitized in the flash ADC for neutron-gamma and background discrimination. Hardware event filtering in the FPGA allows event rates up to 1 Mevents=s by disentangling of two events occurring within the delay line time length of e.g. 250 ns: Whilst list mode data are recorded with full rate and full resolution on the host PC disk, 1D-3D histograms can be accumulated online in the on-board HM for a fraction of the data and with reduced resolution.
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