A parallel 1-D FFT algorithm for the Hitachi SR8000

✍ Scribed by Daisuke Takahashi

• Publisher: Elsevier Science
• Year: 2003
• Tongue: English
• Weight: 123 KB
• Volume: 29
• Category: Article
• ISSN: 0167-8191
• DOI: 10.1016/s0167-8191(03)00039-5

✦ Synopsis

In this paper, we propose a high-performance parallel one-dimensional fast Fourier transform (FFT) algorithm on clusters of vector symmetric multiprocessor (SMP) nodes. The fourstep FFT algorithm can be altered into a five-step FFT algorithm to expand the innermost loop length. We use the five-step algorithm to implement the parallel one-dimensional FFT algorithm. In our proposed parallel FFT algorithm, since we use cyclic distribution, all-toall communication takes place only once. Moreover, the input data and output data are both in natural order. Performance results of one-dimensional power-of-two FFTs on clusters of pseudo-vector SMP nodes, Hitachi SR8000, are reported. We succeeded in obtaining performance of over 61 GFLOPS on a 16-node Hitachi SR8000/MPP.