A new method to characterize border traps in submicron transistors using hysteresis in the drain current

✍ Scribed by ManjulaRani, K.N.; Rao, V.R.; Vasi, J.

• Book ID: 114617051
• Publisher: IEEE
• Year: 2003
• Tongue: English
• Weight: 442 KB
• Volume: 50
• Category: Article
• ISSN: 0018-9383
• DOI: 10.1109/ted.2003.812101