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A new approach to sizing analog CMOS building blocks using pre-compiled neural network models

✍ Scribed by Kaustubha Mendhurwar; Harsh Sundani; Priyanka Aggarwal; Rabin Raut; Vijay Devabhaktuni


Book ID
106342879
Publisher
Springer
Year
2011
Tongue
English
Weight
830 KB
Volume
70
Category
Article
ISSN
0925-1030

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