Increases in the demand for integrated circuits have highlighted the importance of meeting customer quality and on-time delivery expectations in the semiconductor industry. A modiΓΏed shifting bottleneck heuristic is developed for minimizing the total weighted tardiness in a semiconductor wafer fabri
A modified shifting bottleneck heuristic for the reentrant job shop scheduling problem with makespan minimization
β Scribed by Seyda Topaloglu; Gamze Kilincli
- Publisher
- Springer
- Year
- 2009
- Tongue
- English
- Weight
- 281 KB
- Volume
- 44
- Category
- Article
- ISSN
- 0268-3768
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We present a shifting bottleneck heuristic for minimizing the total weighted tardiness in a job shop. The method decomposes the job shop into a number of single-machine subproblems that are solved one after another. Each machine is scheduled according to the solution of its corresponding subproblem.
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