✦ LIBER ✦
A low-power analog sampled-data VLSI architecture for equalization and FDTS/DF detection
✍ Scribed by Carley, I.R.; Bracken, K.C.; Mittal, R.; Park, J.
- Book ID
- 114548299
- Publisher
- IEEE
- Year
- 1995
- Tongue
- English
- Weight
- 569 KB
- Volume
- 31
- Category
- Article
- ISSN
- 0018-9464
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