✦ LIBER ✦
A hybrid design-time/run-time scheduling flow to minimise the reconfiguration overhead of FPGAs
✍ Scribed by Javier Resano; Diederik Verkest; Daniel Mozos; Serge Vernalde; Francky Catthoor
- Book ID
- 118486141
- Publisher
- Elsevier Science
- Year
- 2004
- Tongue
- English
- Weight
- 521 KB
- Volume
- 28
- Category
- Article
- ISSN
- 0141-9331
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