๐”– Bobbio Scriptorium
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A high speed systolic architecture for labeling connected components in an image

โœ Scribed by Ranganathan, N.; Mehrotra, R.; Subramanian, S.


Book ID
114550652
Publisher
Institute of Electrical and Electronics Engineers
Year
1995
Weight
927 KB
Volume
25
Category
Article
ISSN
0018-9472

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Connected component labeling for binary
โœ Prabir Bhattacharya ๐Ÿ“‚ Article ๐Ÿ“… 1996 ๐Ÿ› Elsevier Science ๐ŸŒ English โš– 311 KB

We show how some existing component labeling algorithms for binary images could be speeded up by using the reconfigurable mesh architecture. Two algorithms are presented, the first one uses the ability of the reconfigurable mesh to perform certain operations in constant time, and the second one uses