A high precision close-loop programmable CMOS delay generator for UWB and time domain RF applications
✍ Scribed by Rui Xu; Cam Nguyen
- Publisher
- John Wiley and Sons
- Year
- 2010
- Tongue
- English
- Weight
- 234 KB
- Volume
- 53
- Category
- Article
- ISSN
- 0895-2477
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✦ Synopsis
Abstract
This article presents a novel programmable high precision delay generator with adjustable digital control for ultra‐wideband and time‐domain RF applications.Ring oscillator based phase locked loop (PLL) is embedded to achieve desired propagation delay in the delay cell against process, temperature, and power supply variations. A replica inverter delay line parallel to the PLL offers a separate delay path for input clock. Sub‐nanosecond delay step with high accuracy can be obtained by shaping the input clock slope and keeping a careful matching between the replica delay line and the delay cell in PLL. The prototype of the delay generator is implemented on a 0.18‐μm CMOS process. The measurement results show relative delay error of 0.8%. The circuit consumes 9.5 mA from a 1.8‐V power supply. © 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 53:390–392, 2011; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.25732