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A high-performance and memory-efficient VLSI architecture with parallel scanning method for 2-D lifting-based discrete wavelet transform

✍ Scribed by Yeong-Kang Lai; Lien-Fei Chen; Yui-Chih Shih

Book ID: 117910588
Publisher: IEEE
Year: 2009
Tongue: English
Weight: 707 KB
Volume: 55
Category: Article
ISSN: 0098-3063
DOI: 10.1109/tce.2009.5174400

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