✍ Scribed by Chieh-Pin Chang; Jian-An Hou; Jionguang Su; Ja-Hao Chen; Chih-Wei Chen; Tsyr-Shyang Liou; Shyh-Chyi Wong; Yeong-Her Wang
No coin nor oath required. For personal study only.
A high power gain, low noise WLAN receiver, using a 158 GHz f~T~ 90‐nm RF CMOS technology for dual IF double downconversion system‐in‐package application is demonstrated. The proposed circuit could improve the design flexibility of back‐end stages due to its high power gain and low noise performances. The LNA and Mixer are biased at 1 V with 12.9 mA and 1.8 V with 5.5 mA, respectively. The proposed circuit delivers the double‐sideband noise figure of 2.68 dB, conversion gain of 36.24 dB, IIP3 of −25 dBm, IIP2 of 21.1 dBm, and LO‐IF isolation of −56.2 dB under the 1 dBm LO power, while maintaining the RF port and IF port return losses below −12.9 and −18.7 dB, respectively. © 2007 Wiley Periodicals, Inc. Microwave Opt Technol Lett 49: 2422–2425, 2007; Published online in Wiley InterScience (www.interscience.wiley.com) DOI 10.1002/mop.22782
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