✦ LIBER ✦
A failure analysis technique for locating the fail site in MOSFET (LSI) logic chips with sputtered SIO2 passivation : A. A. Viele. Proc. IEEE Reliability Physics Symposium. April 2–4, 1974. p. 16
- Book ID
- 103270282
- Publisher
- Elsevier Science
- Year
- 1975
- Tongue
- English
- Weight
- 128 KB
- Volume
- 14
- Category
- Article
- ISSN
- 0026-2714
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