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A Digital Envelope Combiner for Switching Power Amplifier Linearization

โœ Scribed by Singhal, N.; Pamarti, S.

Book ID
115498706
Publisher
Institute of Electrical and Electronics Engineers
Year
2010
Tongue
English
Weight
434 KB
Volume
57
Category
Article
ISSN
1549-7747

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## Abstract We investigate on linearization performance of a digital predistortion (DPD) linearization technique based on the low memory power amplifier (PA) for wideband signals. The low memory PA is implemented using a 90W PEP LDMOSFET at 2.14 GHz, and an envelope short matching topology is appli