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A charge-transfer amplifier and an encoded-bus architecture for low-power SRAM's

✍ Scribed by Kawashima, S.; Mori, T.; Sasagawa, R.; Hamaminato, M.; Wakayama, S.; Sukegawa, K.; Fukushi, I.

Book ID: 119775057
Publisher: IEEE
Year: 1998
Tongue: English
Weight: 177 KB
Volume: 33
Category: Article
ISSN: 0018-9200
DOI: 10.1109/4.668995

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