✦ LIBER ✦
A Broadband Chip-Level Power-Bus Model Feasible for Power Integrity Chip-Package Codesign in High-Speed Memory Circuits
✍ Scribed by Hao-Hsiang Chuang; Chih-Jung Hsu; Hong, J.; Chun-Huang Yu; Cheng, A.; Ku, J.; Tzong-Lin Wu
- Book ID
- 114624802
- Publisher
- IEEE
- Year
- 2010
- Tongue
- English
- Weight
- 530 KB
- Volume
- 52
- Category
- Article
- ISSN
- 0018-9375
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