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A 6-bit 1-GS/s Two-Step SAR ADC in 40-nm CMOS

✍ Scribed by Tai, Hung-Yen ;Tsai, Cheng-Hsueh ;Tsai, Pao-Yang ;Chen, Hung-Wei ;Chen, Hsin-Shu

No coin nor oath required. For personal study only.

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