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A 40-GHz Fast-Locked All-Digital Phase-Locked Loop Using a Modified Bang-Bang Algorithm

โœ Scribed by Chao-Ching Hung; Shen-Iuan Liu


Book ID
114614321
Publisher
Institute of Electrical and Electronics Engineers
Year
2011
Tongue
English
Weight
604 KB
Volume
58
Category
Article
ISSN
1549-7747

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A novel technique called an iterative linear digital phase locked loop (DPLL) for fringe-pattern demodulation is presented. The proposed technique has better noise immunity than the basic onedimensional DPLL algorithms (e.g., conventional and linear DPLLs) because it processes a fringe pattern in tw