✦ LIBER ✦
A 220-mm2, four- and eight-bank, 256-Mb SDRAM with single-sided stitched WL architecture
✍ Scribed by Kirihata, T.; Gall, M.; Hosokawa, K.; Dortu, J.-M.; Hing Wong; Pfefferi, P.; Ji, B.L.; Weinfurtner, O.; DeBrosse, J.K.; Terletzki, H.; Selz, M.; Ellis, W.; Wordeman, M.R.; Kiehl, O.
- Book ID
- 119775171
- Publisher
- IEEE
- Year
- 1998
- Tongue
- English
- Weight
- 185 KB
- Volume
- 33
- Category
- Article
- ISSN
- 0018-9200
- DOI
- 10.1109/4.726565
No coin nor oath required. For personal study only.