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A 21-mW 8-b 125-MSample/s ADC in 0.09-mm2 0.13-μm CMOS

✍ Scribed by Mulder, J.; Ward, C.M.; Chi-Hung Lin; Kruse, D.; Westra, J.R.; Lugthart, M.; Arslan, E.; van de Plassche, R.J.; Bult, K.; van der Goes, F.M.L.


Book ID
119799487
Publisher
IEEE
Year
2004
Tongue
English
Weight
907 KB
Volume
39
Category
Article
ISSN
0018-9200

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A 14b 150 MS/s 140 mW 2.0 mm2 0.13µm CMO
✍ Hee-Cheol Choi; Pil-Seon Yoo; Gil-Cho Ahn; Seung-Hoon Lee 📂 Article 📅 2011 🏛 John Wiley and Sons 🌐 English ⚖ 551 KB

This work proposes a 14 b 150 MS/s CMOS A/D converters (ADC) for software-defined radio systems requiring simultaneously high-resolution, low-power, and small chip area at high speed. The proposed calibration-free ADC employs a wide-band low-noise input sample-and-hold amplifier (SHA) along with a f