A 1.8-V embedded 18-Mb DRAM macro with a 9-ns RAS access time and memory-cell area efficiency of 33%

✍ Scribed by Yokoyama, Y.; Itoh, N.; Hasegawa, M.; Katayama, M.; Akasaki, H.; Kaneda, M.; Ueda, T.; Tanaka, Y.; Yamasaki, E.; Todokoro, M.; Toriyama, K.; Miki, H.; Yagyu, M.; Takashima, K.; Kobayashi, T.; Miyaoka, S.; Tamba, N.

• Book ID: 119775824
• Publisher: IEEE
• Year: 2001
• Tongue: English
• Weight: 188 KB
• Volume: 36
• Category: Article
• ISSN: 0018-9200
• DOI: 10.1109/4.910489