✦ LIBER ✦
A 1.5-ns cycle-time 18-kb pseudo-dual-port RAM with 9K logic gates
✍ Scribed by Iwabuchi, M.; Usami, M.; Kashiyama, M.; Oomori, T.; Murata, S.; Hiramoto, T.; Hashimoto, T.; Nakajima, Y.
- Book ID
- 119773977
- Publisher
- IEEE
- Year
- 1994
- Tongue
- English
- Weight
- 664 KB
- Volume
- 29
- Category
- Article
- ISSN
- 0018-9200
- DOI
- 10.1109/4.280690
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