✦ LIBER ✦

A 10-bit 60-MS/s Low-Power Pipelined ADC With Split-Capacitor CDS Technique

✍ Scribed by Jin-Fu Lin; Soon-Jyh Chang; Chun-Cheng Liu; Chih-Hao Huang

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

A 10-bit 50 MS/s Pipelined ADC With Capa

✍ Byung-Geun Lee; Tsang, R.M. 📂 Article 📅 2009 🏛 IEEE 🌐 English ⚖ 697 KB

A 1.8-V 67-mW 10-bit 100-MS/s pipelined

✍ Jipeng Li; Un-Ku Moon 📂 Article 📅 2004 🏛 IEEE 🌐 English ⚖ 897 KB

A 10-MS/s-to-100-kS/s Power-Scalable Ful

✍ Mu-Chen Huang; Shen-Iuan Liu 📂 Article 📅 2010 🏛 Institute of Electrical and Electronics Engineers 🌐 English ⚖ 659 KB

[IEEE ISCAS 2001. The 2001 IEEE Internat

✍ Yong-In Park, ; Karthikeyan, S.; Tsay, F.; Bartolome, E. 📂 Article 📅 2001 🏛 IEEE 🌐 English ⚖ 509 KB

[IEEE 2010 10th IEEE International Confe

✍ Ning, Qiao; Silin, Liu; Fang, Yu; Zhongli, Liu 📂 Article 📅 2010 🏛 IEEE ⚖ 544 KB