<p>Back Cover Copy SERIES: Integrated Circuits and Systems 3D-Integration for NoC-based SoC Architectures by: (Editors) Abbas Sheibanyrad Frédéric Petrot Axel Janstch This book investigates on the promises, challenges, and solutions for the 3D Integration (vertically stacking) of embedded systems co
3D Integration for NoC-based SoC Architectures
✍ Scribed by Chuan Seng Tan (auth.), Abbas Sheibanyrad, Frédéric Pétrot, Axel Jantsch (eds.)
- Publisher
- Springer-Verlag New York
- Year
- 2011
- Tongue
- English
- Leaves
- 285
- Series
- Integrated Circuits and Systems
- Edition
- 1
- Category
- Library
No coin nor oath required. For personal study only.
✦ Synopsis
Back Cover Copy SERIES: Integrated Circuits and Systems 3D-Integration for NoC-based SoC Architectures by: (Editors) Abbas Sheibanyrad Frédéric Petrot Axel Janstch This book investigates on the promises, challenges, and solutions for the 3D Integration (vertically stacking) of embedded systems connected via a network on a chip. It covers the entire architectural design approach for 3D-SoCs. 3D-Integration technologies, 3D-Design techniques, and 3D-Architectures have emerged as topics critical for current R&D leading to a broad range of products. This book presents a comprehensive, system-level overview of three-dimensional architectures and micro-architectures. •Presents a comprehensive, system-level overview of three-dimensional architectures and micro-architectures; •Covers the entire architectural design approach for 3D-SoCs; •Includes state-of-the-art treatment of 3D-Integration technologies, 3D-Design techniques, and 3D-Architectures.
✦ Table of Contents
Front Matter....Pages 1-1
Front Matter....Pages 1-1
Three-Dimensional Integration of Integrated Circuits—an Introduction....Pages 3-26
The Promises and Limitations of 3-D Integration....Pages 27-44
Front Matter....Pages 45-45
Testing 3D Stacked ICs Containing Through-Silicon Vias....Pages 47-74
Design and Computer Aided Design of 3DIC....Pages 75-88
Physical Analysis of NoC Topologies for 3-D Integrated Systems....Pages 89-114
Three-Dimensional Networks-on-Chip: Performance Evaluation....Pages 115-145
Front Matter....Pages 147-147
Asynchronous 3D-NoCs Making Use of Serialized Vertical Links....Pages 149-165
Design of Application-Specific 3D Networks-on-Chip Architectures....Pages 167-191
3D Network on Chip Topology Synthesis: Designing Custom Topologies for Chip Stacks....Pages 193-223
3-D NoC on Inductive Wireless Interconnect....Pages 225-248
Influence of Stacked 3D Memory/Cache Architectures on GPUs....Pages 249-271
Back Matter....Pages 266-266
✦ Subjects
Circuits and Systems; Software Engineering
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